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| ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Features and Benefits True zero-speed operation Automatic Gain Control (AGC) for air gap independent switchpoints Automatic Offset Adjustment (AOA) for signal processing optimization Running-mode calibration for continuous optimization Precise duty cycle over operating temperature range Internal current regulator for two-wire operation Undervoltage lockout On-chip voltage regulator with wide operating voltage range and stability in the presence of a variety of complex load impedances Single chip IC for high reliability Description The ATS682LSH is a Hall-effect integrated circuit and rare earth pellet combination that provides a user-friendly solution for true zero-speed digital gear-tooth sensing in two-wire applications. This small package, with an optimized two-wire leadframe, can be easily assembled and used in conjunction with a wide variety of gear shapes and sizes. The integrated circuit incorporates a dual-element Hall-effect circuit and signal processing that switches in response to differential magnetic signals created by ferrous gear teeth. The circuitry contains a sophisticated digital circuit that reduces magnet and system offsets, calibrates the gain for air gap independent switchpoints and provides true zero-speed operation. Signal optimization occurs at power-up through the adjustment of offset and gain and is and is maintained throughout operation with the use of a running-mode calibration scheme. Runningmode calibration provides immunity from environmental effects such as micro-oscillations of the sensed target or sudden air gap changes. The regulated current output is configured for two-wire interface circuitry and is ideally suited for obtaining speed information in wheel speed applications. The Hall element spacing is optimized for high resolution, small diameter targets. The package is lead (Pb) free, with 100% matte tin lead frame plating. Package: 4-pin SIP (suffix SH) Not to scale Functional Block Diagram Hall Amplifier Gain VCC Automatic Offset Control AOA DAC AGC DAC Internal Regulator Gain Control Tracking DAC Peak Hold GND Test Signals Test ATS682-DS, Rev. 2 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Selection Guide Part Number Packing* ATS682LSHTN-T 800 pieces per 13-in. reel *Contact Allegro(R) for additional packing options Absolute Maximum Ratings Characteristic Supply Voltage Reverse Supply Voltage Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Symbol VCC VRCC TA TJ(max) Tstg Range L Notes Refer to Power Derating curve Rating 28 -18 -40 to 150 165 -65 to 170 Unit V V C C C Pin-out Diagram Terminal List Number 1 2 3 Name VCC NC TEST GND Function Connects power supply to chip No connection Test (float or tie to ground) Ground terminal 1234 4 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC OPERATING CHARACTERISTICS Valid at VCC and TA within specification; unless otherwise noted Characteristics Electrical Characteristics Supply Voltage3 Undervoltage Lockout Supply Zener Clamp Voltage Supply Zener Current Supply Current Supply Current Ratio Reverse Battery Current4 Power-On State Characteristics Power-On Time5 Power-On State6 tPO POS VCC > VCC(min), fOP < 100 Hz t > tPO RSENSE = 100 , CLOAD = 10 pF, no CBYP (see figure 7) - - 1 ICC(HIGH) 2 - ms - VCC VCCUV VZ IZ ICC(LOW) ICC(HIGH) ICC(HIGH)/ ICC(LOW) IRCC Measured as ratio of high current to low current VRCC = -18 V Operating, TJ < TJ(max) VCC = 0 5 V or 5 0 V ICC = ICC(max) + 3 mA, TA = 25C TA = 25C, VS = 28 V 4.0 - 28 - 5.0 11.8 1.9 - - - - - 7 14 - - 24 3.95 - 19.8 8.4 16.8 - -5 V V V mA mA mA - mA Symbol Test Conditions Min. Typ.1 Max. Unit2 Output Stage Output Slew Rate7,8 Performance Characteristics Operating Frequency9 Analog Signal Bandwidth Operate Point Release Point Calibration Initial Calibration CALI Quantity of rising output (current) edges required for accurate edge detection; edge accuracy not guaranteed during initial calibration. - - 3 edge fOP BW BOP BRP Magnitude (see figure 6) Magnitude (see figure 6) 0 20 - - - 40 120 120 8000 - - - Hz kHz mV mV dI/dt - 14 - mA/s Continued on the next page... Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC OPERATING CHARACTERISTICS (continued) Valid at VCC and TA within specification; unless otherwise noted Characteristics Allowable User-Induced Differential Offset Functional Characteristics Operating Signal Range10 Minimum Operating Signal Allowable Signal Amplitude Variation Operational Air Gap Range Maximum Operational Air Gap Range Duty Cycle11 Consecutive Duty Cycle Variation12 1Typical 21 Symbol Test Conditions Min. Typ.1 Max. Unit2 Digital-to-Analog Converter (DAC) Characteristics BDIFFEXT Operation within specification - 60 - G BDIFF BDIFFOP(MIN) BSOA AG AGOP(MAX) D errD Differential signal, measured peak-to-peak; operation within specification Output switching (no missed edges); duty cycle not guaranteed See Functional Description section Using Reference Target 60-0, duty cycle within specification Using Reference Target 60-0, output switching (no missed edges); duty cycle not guaranteed AG within specification AG = 1.5 mm 30 20 - 0.5 - 41 - - - - - - - 1.5 1000 - - 2.75 3.00 61 - G G - mm mm % % values are at TA = 25C and VCC = 12 V. Performance may vary for individual units, within the specified maximum and minimum limits. G (gauss) = 0.1 mT (millitesla). 3Maximum voltage must be adjusted for power dissipation and junction temperature; see Power Derating section. 4Negative current is defined as conventional current coming out of (sourced from) the specified device terminal. 5Power-On Time includes the time required to complete the internal automatic offset adjust after which the DAC is ready for peak acquisition. 6See Device Operation section. 7dI is the difference between 10% of I CC(LOW) and 90% of ICC(HIGH), and dt is the time period between those two points. 8C LOAD is the probe capacitance of the oscilloscope used to make the measurement. 9Refer to Functional Description section for performance over input magnetic frequency. 10AG is dependent on the available magnetic field. The available field is dependent on target geometry and material, and should be independently characterized. The field available from the Reference Target is given in the Reference Target parameter section of the datasheet. 11Target rotation from pin 4 to pin 1. 12Consecutive Duty Cycle Variation represents the difference between consecutive duty cycles, D(n) - D(n-1); mean 3 sigma. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Thermal Characteristics may require derating at maximum conditions, see Power Derating section Characteristic Package Thermal Resistance Symbol RJA Test Conditions* Single layer PCB, with copper limited to solder pads Single layer PCB, with copper limited to solder pads and 3.57 cm2) copper area each side in.2 (23.03 Value 126 84 Unit C/W C/W *Additional thermal information available on the Allegro website Power Derating Curve 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 20 40 60 V CC(max) Maximum Allowable V CC(V) (R JA = 84 C/W) (R JA= 126 C/W) V CC(min) 80 100 120 140 160 180 Temperature (C) Power Dissipation versus Ambient Temperature 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 20 40 Power Dissipation, PD (m W) R JA = 84 C/W R JA = 126 C/W 60 80 100 120 Temperature (C) 140 160 180 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 ATS682LSH Reference Target 60-0 (60 Tooth Target) Characteristics Outside Diameter Face Width Angular Tooth Thickness Angular Valley Thickness Tooth Whole Depth Material Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Symbol Do F t tv ht Low Carbon Steel Test Conditions Outside diameter of target Breadth of tooth, with respect to branded face Length of tooth, with respect to branded face Length of valley, with respect to branded face Typ. 120 6 3 3 3 - Units mm mm Symbol Key t Do F ht tv deg. deg. Air Gap mm - Branded Face of Package Branded Face of Package Reference Target 60-0 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Characteristic Performance Supply Current (Low) versus Supply Voltage Supply Current (Low) versus Ambient Temperature Vcc: 4V Vcc: 12V Vcc: 24V 8.0 7.5 -40C 25C 150C 8.0 7.5 ICC(LOW) (mA) ICC(LOW) (mA) 7.0 6.5 6.0 5.5 5.0 0 5 10 VCC (V) 15 20 25 7.0 6.5 6.0 5.5 5.0 -50 0 50 TA (C) 100 150 Suppply Current (High) versus Supply Voltage 16.8 16.3 15.8 15.3 14.8 14.3 13.8 13.3 12.8 12.3 11.8 0 5 10 VCC (V) 15 20 25 -40C 25C 150C Supply Current (High) versus Ambient Temperature 16.8 16.3 15.8 Vcc: 24V Vcc: 12V Vcc: 4V ICC(HIGH) (mA) ICC(HIGH) (mA) 15.3 14.8 14.3 13.8 13.3 12.8 12.3 11.8 -50 0 50 TA (C) 100 150 Supply Current Ratio versus Ambient Temperature 2.50 2.40 Vcc: 4V Vcc: 18V ICC(HIGH) / ICC(LOW) 2.30 2.20 2.10 2.00 1.90 -50 0 50 TA (C) 100 150 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Duty Cycle versus Air Gap Allegro 60-0 Target at 1000 rpm 61 59 57 Duty Cycle (%) 55 53 51 49 47 45 43 41 0.5 1 1.5 AG (mm) 2 2.5 3 150C 25C -40C The trend of duty cycle versus air gap is driven by the actual magnetic profile of the target (see Reference Target figures) Duty Cycle versus Ambient Temperature Allegro 60-0 Target at 1000 rpm 61 59 57 Duty Cycle (%) 55 53 51 49 47 45 43 41 -50 0 50 TA (C) 100 150 AG: 0.5mm AG: 1.25mm AG: 2.75mm Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Functional Description shown is perpendicular to the leads, across the face of the device, from pin 1 to pin 4. This results in the IC output switching from high, ICC(HIGH), to low ICC(LOW), as the leading edge of a tooth (a rising mechanical edge, as detected by the IC) passes the branded face. In this configuration, the device output current switches to its low polarity when a tooth is the target feature nearest to the branded face. If the direction of rotation is reversed, then the output polarity inverts. Note: the translated output voltage polarity is dependent on the position of a sense resistor, RSENSE (see figure 4). Target Mechanical Profile Hall Technology This single-chip differential Hall-effect sensor IC possesses two Hall elements spaced at a fixed distance (1.5 mm), which simultaneously are affected by the magnetic profile of the target, and generate a differential internal analog voltage, VPROC, that is processed for precise switching of the digital output signal. The Hall IC is self-calibrating and also possesses a temperature compensated amplifier and offset compensation circuitry. Its voltage regulator provides supply noise rejection throughout the operating voltage range. Changes in temperature do not greatly affect this device due to the stable amplifier design and the offset compensation circuitry. The Hall transducers and signal processing electronics are integrated on the same silicon substrate, using a proprietary BiCMOS process. Target Profiling An operating device is capable of providing digital information that is representative of the magnetic features on a rotating target. The waveform diagram shown in figure 3 represents the automatic translation of the magnetic profile to the digital output signal of the IC. Output Polarity Figure 3 shows the output polarity for the orientation of the target and package shown in figure 2. The target direction of rotation Target (Gear) Element Pitch Hall Element 2 South Pole North Pole (Pin 4 Side) Hall Element 1 Hall IC Pole Piece (Concentrator) Back-biasing Rare-earthPellet Case (Pin 1 Side) Representative Differential Magnetic Profile IC Electrical Output Profile, IOUT Figure 3. Output Profile of a gear target for the polarity indicated in figure 2. VCC VCC RSENSE ICC VOUT(H) Dual-Element Hall Effect Device 1 VCC ATS682 GND 4 VOUT(L) 1 VCC ATS682 GND 4 Figure 1. Relative motion of the target is detected by the dual Hall elements mounted on the Hall IC. ICC RSENSE Rotating Target Branded Face of Package I+ IOUT V+ VOUT(L) 1 4 V+ VOUT(H) Figure 2. This left-to-right (pin 1 to pin 4) direction of target rotation results in a low output signal when a tooth of the target gear is nearest the face of the package (see Figure 3). A right-to-left (pin 4 to pin 1) rotation inverts the output signal polarity. Figure 4. Voltage profiles for high-side and low-side two-wire sensing. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Automatic Gain Control (AGC) AGC allows the device to operate with an optimal internal electrical signal, regardless of the air gap (within the operating signal range specification). During calibration, the device determines the peak-to-peak amplitude of the signal generated by the target and automatically adjusts the signal gain. Figure 5 illustrates the effect of this feature. Automatic Offset Adjust (AOA) AOA circuitry automatically compensates for the effects of chip, magnet, and installation offsets. (For capability, see Allowable User-Induced Differential Offset, in the Operating Characteristics table.) This circuitry is continuously active in both calibration mode and running mode. Continuous operation of AOA allows the IC to compensate for offset drift and for offsets induced by temperature variations over time. Digital Peak Detection A digital-to-analog converter (DAC) tracks the internal analog voltage signal VPROC, and is used for holding the peak value of the internal analog signal. In the example shown in figure 6, the DAC would first track up with the signal and hold the upper peak value. When VPROC drops below this peak value by BOP, the device hysteresis, the output switches, and the DAC begin tracking the signal downward toward the negative VPROC peak. After the DAC acquires the negative peak, the output again switches states when VPROC is greater than the peak by the value BRP. At this point, the DAC tracks up again and the cycle repeats. The digital tracking of the differential analog signal allows the IC to achieve true zero-speed operation. Ferrous Target Mechanical Profile V+ Internal Differential Analog Signal Response, without AGC V+ Internal Differential Analog Signal AGLarge BOP AGSmall BRP V+ Internal Differential Analog Signal Response, with AGC AGSmall AGLarge I+ Device Output Current Figure 5: Automatic Gain Control (AGC). The AGC function corrects for variances in the air gap. Differences in the air gap affect the magnetic gradient, but AGC prevents that from affecting device performance, as shown in the lowest panel. Figure 6. Peak detection switchpoint detail Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Power Supply Protection The device contains an on-chip regulator and can operate over a wide VCC range. For devices that need to operate from an unregulated power supply, transient protection must be added externally. For applications using a regulated line, EMI/RFI protection may still be required. Contact Allegro for information on the circuitry needed for compliance with various EMC specifications. Refer to figure 7 for an example of a basic application circuit. Undervoltage Lockout When the supply voltage falls below the undervoltage lockout threshold, VCC(UV), the device enters Reset mode, where the output state returns to the Power-On State (POS) until sufficient VCC is supplied. ICC levels may not meet datasheet limits when VCC < VCC(min). Assembly Description This device is molded into a plastic body that has been optimized for size, ease of assembly, and manufacturability. High operatV+ ing temperature materials are used in all aspects of construction. Refer to the Allegro website, www.allegromicro.com, for more specific applications notes on finished package processing. Diagnostics The regulated current output is configured for two-wire applications, requiring one less wire for operation than do switches with the traditional open-collector output. Additionally, the system designer inherently gains diagnostics because there is always output current flowing, which should be in either of two narrow ranges, shown in figure 8 as ICC(HIGH) and ICC(LOW). Any current level not within these ranges indicates a fault condition. If ICC > ICC(HIGH)(max), then a short condition exists, and if ICC < ICC(LOW)(min), then an open condition exists. Any value of ICC between the allowed ranges for ICC(HIGH) and ICC(LOW) indicates a general fault condition. 1 VCC ATS682 CBYP 0.01 F GND 4 +mA ICC(HIGH)(max) ICC(HIGH)(min) ICC(LOW)(max) Short Test pin floating Fault Range for Valid ICC(HIGH) ECU ICC(LOW)(min) 100 RSENSE CLOAD Range for Valid ICC(LOW) Open 0 Figure 7. Typical application circuit Figure 8. Diagnostic characteristics of supply current values Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Device Operation Power-On When power (VCC > VCC(min)) is applied to the device, a short period of time is required to activate the various portions of the IC. During this period, the ATS682 powers-on in the high current state, ICC(HIGH). After power-on, there are conditions that could induce a change in the output state. Such an event could be caused by thermal transients, but it would also require a static applied magnetic field, proper signal polarity, and particular direction and magnitude of internal signal drift. Initial Offset Adjust The IC initially compensates for differential offset, BAPP, that results from chip, magnet, and installation alignment. Once the effective differential magnetic offset has been cancelled, the digital tracking DAC is ready to track the signal and provide output switching. The period of time required for both power-on and initial offset adjust is defined as the Power-On Time specification. Calibration Mode The calibration mode allows the IC to automatically select the proper signal gain and continue to adjust for DC differential magnetic offset. The AGC is active, and selects the optimal signal gain based on the amplitude of the VPROC signal. Following each adjustment to the AGC DAC, the Offset DAC is also adjusted to ensure the internal analog signal is properly centered. During this mode, the tracking DAC is active and output switching occurs, but the duty cycle is not guaranteed to be within specification. Running Mode After the initial calibration process (CALI edges) establishes a signal gain, the device moves to Running mode. During Running mode, the IC tracks the input signal and continues to give an output edge for every peak of the signal. AOA remains active to compensate for any offset drift over time. The ATS682 also incorporates an algorithm for adjusting the signal gain during Running mode. This algorithm is designed to optimize the VPROC signal amplitude in instances where the magnetic signal during the calibration period is not representative of the amplitude of the magnetic signal for the installed application air gap (see figure 9). 1 2 3 4 5 BOP Internal Differential Signal, VPROC BOP BRP BRP IC Electrical Output, IOUT Figure 9: Operation of Running Mode Gain Adjust. Position 1. The device is initially powered-on. Self-calibration occurs. Position 2. Small amplitude oscillation of the target sends an erroneously small differential signal to the device. The amplitude of VPROC is greater than the switching hysteresis (BOP and BRP), and the device output switches. Position 3. The calibration period completes on the third rising output edge, and the device enters Running mode. Position 4. True target rotation occurs and the correct magnetic signal is generated for the installation air gap. The established signal gain is too large for the rotational magnetic signal of the target, at the given air gap. Position 5. Running mode calibration corrects the signal gain to an optimal level for the installation air gap. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Characteristic Allowable Signal Amplitude Variation The colored area in figure 10 shows BSOA, the safe operating area of allowable magnetic signal amplitude within which the IC will continue output switching. The output duty cycle is wholly dependent on the magnetic signature of the target across the air gap range of movement, and may not always be within specification throughout the entire operating region (to BDIFF(max)). Signal amplitude changes may be due to deflection (relative air gap change between Hall element and target), target eccentricity, magnet temperature coefficient or a combination thereof. The axis parameters for the chart in figure 10 are defined in figure 11. As an example, assume the case where the signal changes from the nominal at the installed air gap (BCAL) within the range defined by an increase factor of BDIFF(max) / BCAL = 3.0, and a decrease of BDIFF(lim) / BCAL = 0.75. This case is plotted with an "x" in figure 10. 0.2 0.3 0.4 BDIFF(lim) / BCAL 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1 2 3 4 5 6 7 Safe Operating Area x Guard-banded Nominal 8 9 BDIFF(max) / BCAL Figure 10. Allowable Signal Amplitude Change chart BDIFF(max) BCAL BDIFF(lim) Figure 11. Illustration of BCAL, BDIFF(max) and BDIFF(lim) for amplitude variation discussion. BCAL is the magnetic amplitude at the IC during its calibration cycle BDIFF(max) and BDIFF(lim) are the maximum and minimum magnetic amplitudes during IC operation. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RJC, is a relatively small component of RJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN x IIN T = PD x RJA TJ = TA + T For example, given common conditions such as: TA= 25C, VCC = 12 V, ICC = 7 mA, and RJA = 126 C/W, then: PD = VCC x ICC = 12 V x 7 mA = 84 mW T = PD x RJA = 84 mW x 126 C/W = 10.6C TJ = TA + T = 25C + 10.6C = 35.6C A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RJA and TA. (1) (2) (3) Example: Reliability for VCC at TA = 150C. Observe the worst-case ratings for the device, specifically: RJA = 126C/W, TJ(max) = 165C, VCC(max) = 24 V, and ICC = 16.8 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: T(max) = TJ(max) - TA = 165 C - 150 C = 15 C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = T(max) / RJA = 15C / 126 C/W = 119 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) / ICC = 119 mW / 16.8 mA = 7.1V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages VCC(est). Compare VCC(est) to VCC(max). If VCC(est) VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RJA. If VCC(est) VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Package SH 4-Pin SIP 5.500.05 F F 0.75 0.75 8.000.05 E B LLLLLLL NNN 5.800.05 E1 E2 Branded Face YYWW 1.700.10 5.000.10 4.000.10 1 2 3 4 A 0.600.10 0.710.05 D Standard Branding Reference View = Supplier emblem L = Lot identifier N = Last three numbers of device part number Y = Last two digits of year of manufacture W = Week of manufacture For Reference Only, not for tooling use (reference DWG-9003) Dimensions in millimeters 24.650.10 A Dambar removal protrusion (16X) B Metallic protrusion, electrically connected to pin 4 and substrate (both sides) C Thermoplastic Molded Lead Bar for alignment during shipment D Branding scale and appearance at supplier discretion E Active Area Depth 0.43 mm REF F 13.100.10 1.000.10 +0.06 0.38 -0.04 Hall elements (E1, E2); not to scale A 1.0 REF 1.600.10 C 1.270.10 5.500.10 0.710.10 0.710.10 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 ATS682LSH Miniature, Two-Wire, True Zero Speed Differential Peak-Detecting Sensor IC Copyright (c)2009, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,264,783; 5,389,889; 5,442,283; 5,517,112; 5,581,179; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; 6,091,239; 6,100,680; 6,232,768; 6,242,908; 6,265,865; 6,297,627; 6,525,531; 6,690,155; 6,693,419; 6,919,720; 7,046,000; 7,053,674; 7,138,793; 7,199,579; 7,253,614; 7,365,530; 7,368,904; 7,518,414; 7,548,056; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16 |
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